COMPUTER ARCHITECTURE-2

Academic year
2023/2024 Syllabus of previous years
Official course title
ARCHITETTURA DEGLI ELABORATORI - MOD.2
Course code
CT0653 (AF:493974 AR:273825)
Modality
On campus classes
ECTS credits
6 out of 9 of COMPUTER ARCHITECTURE
Subdivision
Surnames M-Z
Degree level
Bachelor's Degree Programme
Educational sector code
ING-INF/05
Period
1st Semester
Course year
1
Where
VENEZIA
Moodle
Go to Moodle page
The teaching falls within the basic educational activities of the degree course in Computer Science.
It allows for learning foundations and techniques for the design of the main components of a computer: Processor - Input/Output - Memory.
It also permits to deepen the knowledge on the machine/assembly levels of a conventional computer.
Finally, the course emphasizes the hardware/software interface of computers.
Knowledge and understanding:

The student will have mastered the specific technical terminology.
She will be able to recognize and understand the theoretical foundations and techniques for designing the main components of a computer.
She will have knowledge on representation of information and on Boolean logic operations.
She will understand the complexity of modern computer architectures and their influence on software design and performance.
Furthermore, the student will acquire knowledge on the level of machine/assembly programming, and on the translation of simple high-level programs in assembly language.

Ability to apply knowledge and understanding:

The student will be able to carry out exercises aimed at applying the knowledge acquired in the various topics of the course; in particular, on the representation of integer and real numeric values, on the logical design of circuits, on the parallelism at the level of instructions, on the realization of the various levels of memory hierarchies, on assembly translation of high-level imperative programs.
- Computer Architecture (Mod.1)
- Basic concepts of the C programming language
- Advanced project of a CPU: pipeline
- Memory hierarchies
- Input/Output
- Performance evaluation
- The ARM instruction set
- Program execution: compiler, assembler, linker, loader
- The translation process: from C to ARM assembly
- David A. Patterson, John L. Hennessy. "Struttura e Progetto dei Calcolatori" Quinta edizione italiana condotta sulla sesta Edizione americana. Zanichelli, 2022.
- David Money Harris Sarah L. Harris. "Sistemi digitali e architettura dei calcolatori. Progettare con tecnologia ARM", Trad. di O. Scarabottolo, rev. di N. Scarabottolo, Zanichelli, 2017
- Professor's lecture notes
The exam is composed of some open-ended theoretical questions and exercises to test the proficiency of the student with respect to the various topics of the course

The exam is written with a time limit of 90 minutes. It comprises 4 exercises and 3 theoretical questions to test the student's proficiency with respect to the various topics of the course.

Exam structure:
Exercise 1 (6 points): Cache
Exercise 2 (6 points): Dependencies between instructions and temporal execution diagram of a CPU
Exercise 3 (4 points): Translation from C to Assembly ARM A64
Exercise 4 (4 points): Coding in Assembly ARM A64
3 theoretical questions (total 10 points) on the topics studied along the course.
- Frontal theoretical lessons
- Practical examples are shown by the teacher on emulators and/or embedded ARM devices
- Exercises
Italian
written
Definitive programme.
Last update of the programme: 28/02/2024